Meaning
Short-term variation of a digital signal’s significant instances from their ideal positions in time defines the temporal deviation of a clock or data edge. This timing jitter is a primary parameter in high-speed digital systems, as it can cause transmission errors or limit the speed of data transfer. It is measured in the time domain, representing the deviation in the arrival time of a signal transition.
The metric is the time-domain equivalent of phase noise in the frequency domain. High-speed oscilloscopes are used to capture these variations and plot them as an eye diagram to evaluate the timing margin of the link.
Jitter Classification
Classification of these timing variations divides them into deterministic jitter and random jitter. Deterministic jitter has bounded limits and is caused by systemic factors like cross-talk and duty cycle distortion. In contrast, random jitter is unbounded and is caused by thermal noise and shot noise in the electronic components.
Calculation Method
Quantifying these deviations often involves measuring the root-mean-square value of the timing variation over a large number of signal cycles. For serial data links, a histogram of the timing transitions is used to calculate the total timing variation at a specific bit error rate. This analysis helps to estimate the timing margin of the receiver.
Circuit Sourcing
Procuring components for high-speed systems requires selecting clock generators that meet strict timing margin budgets. Low-jitter oscillators are preferred for high-frequency transceivers to ensure that the timing margin is not exhausted by the clock source. The choice between a quartz-based crystal oscillator and a silicon-based generator depends on the jitter limits allowed by the system standard.
